Diodes AP2132A Manual do Utilizador descarregar pdf (Página 2)

Data Sheet

Peak 3A CMOS LDO Regulator with Enable and Power Good AP2132A

Mar. 2012 Rev 1.0 BCD Semiconductor Manufacturing Limited

Pin Configuration

MP Package

(PSOP-8)

VIN

VCTRL

GND

ADJ

VOUT

Figure 2. Pin Configuration of AP2132A (Top View)

Pin Description

Number

Pin Name Function

1 PG Assert high once V

OUT

reaches 92% of its rating voltage

2 EN Enable input

3 VIN Input voltage

4 VCTRL Input voltage for controlling circuit

5 NC Not connected

6 VOUT

Regulated output voltage

7 ADJ

Adjust output: when connected to ground, the output voltage is set by internal

resistors; when external feedback resistors are connected, the output voltage

will be V

OUT

=0.6V×(R1+R2)/R2

8 GND Ground

1 2 3 4 5 6 7 ... 12 13

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